Proteus LRC, Renesas, Synopsys
Renesas Adopts Synopsys' Proteus LRC for Lithography Verification
News Release from:
18 April 2012
Synopsys, Inc. today announced the production qualification and adoption of Synopsys' Proteus LRC at Renesas Electronics Corporation, the world's premier supplier of microcontrollers and a world's leading supplier of advanced semiconductor system solutions including microcontrollers, SoC solutions and a broad-range of analog and power devices. Proteus LRC provides large-scale integrated circuit (LSI) manufacturers like Renesas with a highly accurate and comprehensive lithographic verification solution.
Through the use of industry-proven lithography models and integrated rigorous simulation, Proteus LRC identifies yield-impacting hotspots prior to committing a design to manufacture. Proteus LRC minimizes the risk of costly re-spins and can improve time to market for new technology nodes.
We require a highly accurate lithographic verification solution that has a low cost of ownership and and has ability to reduce our process development time, said Nobuyasu Yui, department manager, Analog Design Technology Development Department, EDA & Design Methodology Division, Technology Development Unit at Renesas Electronics Corporation. The adoption of Proteus LRC for our leading-edge microcontroller has improved our optical proximity correction development efficiency contributing to faster time to market.
Proteus LRC uses the same industry-proven compact models utilized during the application of Proteus optical proximity correction (OPC) for easy deployment and dependable accuracy. Further accuracy and precise validation of hotspots can be achieved through resist profile and topography simulations with the embedded Sentaurus Lithography rigorous simulator. Synopsys has incorporated years of lithography verification knowledge into Proteus LRC to create a comprehensive verification solution and results-viewing-environment for efficient layout processing and results analysis.
Proteus LRC is built on the Proteus engine and integrated into Synopsys' Proteus Pipeline Technology, enabling a single-flow solution from design tapeout to mask fracture. The Pipeline delivers concurrent processing at all stages of the mask synthesis and fracture flow to minimize I/O time for efficient handling of large terabyte datasets encountered at leading-edge technology nodes. The Proteus engine provides an industry-proven platform that is highly scalable to hundreds, even thousands, of CPUs. This enables control of turnaround time while maintaining the lowest cost of ownership through the use of standard x86 processor cores.
Proteus LRC and the embedded Sentaurus Lithography simulator deliver industry-leading hotspot detection accuracy, enabling faster development time and increased first pass yield, said Howard Ko, senior vice president and general manager of the Silicon Engineering Group at Synopsys. Proteus LRC is the product of choice for companies that demand the most accurate verification solution for their post-tapeout flows.