Imec, RAM research, 2012 VLSI
Imec’s resistive RAM research shows momentum in 2012 VLSI Technology Symposium papers
News Release from:
10 April 2012
At this year's Symposia on VLSI Technology and VLSI Circuits (June 12-15, 2012 - Honolulu, USA,), imec and its partners will present 10 papers on memory and logic scaling technology and circuits. With 4 RRAM (resistive RAM) papers accepted, the VLSI reviewing committee endorses the value of imec's R&D program on emerging memory devices. And 5 papers will address logic device scaling and characterization for next-generation CMOS technologies.
This confirms imec’s leading global position as R&D center in CMOS scaling technologies. Besides, imec and its partners will also present one paper on an innovative VLSI circuit for electro-encephalogram (EEG) and contact-impedance acquisition for dry-electrodes.
Gosia Jurczak, Director of imec’s emerging memory device program: “In 2008, imec started with research activities on RRAM in order to explore solutions to overcome the scaling limitations of conventional Flash memory cells. We are very pleased with this year’s high appreciation of imec’s RRAM research papers at the VLSI Technology Symposium. This, and, the fact that since 2008 all major memory players joined our research program on emerging memory technologies, proves the value of our RRAM research to the global industry.”
Aaron Thean, Director of imec's logic device program: “We are delighted that 5 imec papers on advanced logic device process, design, and characterization have been accepted for this year's Symposium on VLSI technology. It is definitely an affirmation of the active device research work at imec to extend Moore's Law scaling.”
Overview of the papers with imec authors, accepted at the VLSI symposia:
Dynamic ‘Hourglass’ Model for SET and RESET in HfO2 RRAM – R. Degraeve et al.
Ultralow sub-500nA operating current high-performance TiN\Al2O3\HfO2\Hf\TiN bipolar RRAM achieved through understanding-based stack-engineering – L. Goux et al.
Process-improved RRAM cell performance and reliability and paving the way for manufacturability and scalability for high density memory application – G.Kar et al.
Field-driven ultrafast sub-ns programming in W\Al2O3\Ti\CuTe-based 1T1R CBRAM system – L. Goux et al.
Logic scaling papers:
Process control & Integration options of RMG Technology for aggressively scaled devices – A. Veloso et al.
Implementing cubic-phase HfO2 with κ-value ~ 30 in low-VT replacement gate pMOS devices for improved EOT-Scaling and reliability – L.
Ragnarsson et al.
85nm-Wide 1.5mA/μm-ION IFQW SiGe-pFET: Raised vs Embedded Si0.75Ge0.25S/D Benchmarking and In-Depth Hole Transport Study – J.
Mitard et al.
GeSn channel nMOSFETs: Material Potential and Technological Outlook – Gupta et al.
Atom Probe Tomography for 3D-Dopant Analysis in FinFET Devices – Kambham et al.
VLSI circuits papers:
A 700μW 8-Channel EEG/Contact-impedance Acquisition System for Dry-electrodes – Mitra et al.