A system approach to power management
News Release from:
Lattice Semiconductor Corporation
09 August 2012
Many approaches to power management sacrifice speed, cost or overall reliability. They impede the design process by requiring the consideration of hundreds of parts from different vendors, require the writing of microprocessor code and, if any hardware and timing changes need to be implemented, the board will require a respin.
Using an integrated part that can be programmed for individual application requirements could greatly simplify the design. Functions that are duplicated in a discrete design, like precision references and timers, could be combined to reduce cost. An integrated solution could utilise closed loop sequencing so power supplies, while resets could be sequenced during power on and power off. Integrating the hot-swap controller enables it to become part of the sequencing and monitoring of voltages. Both analogue voltage monitors and digital IOs could be programmed for a wide variety of applications, making them easy to reuse over multiple designs. Incorporating an internal clock allows resets, enables and watchdog signals to be precisely controlled and eliminates the need for inaccurate R/C networks. With a programmable device, timing, sequencing and hot-swap controllers could be precisely controlled under multiple conditions.
The Lattice Semiconductor Power Manager II family provides just such an integrated power management solution and is well suited for PLC applications. The Power Manager II’s programmable CPLD core, internal clock, precision reference, programmable analogue interfaces, MOSFET drivers and assignable digital I/Os overcome all the system issues associated with other power management designs. These devices allow each design to have a customised solution that addresses all power management issues, and can be reprogrammed easily for additional applications or tweaked to optimise board timing. They offer an integrated approach that greatly reduces design time and can be fully simulated, eliminating board changes.
The POWR607 device is well suited for PLC designs, as it is cost effective yet still integrates all the required functionality, including the hot-swap controller, allowing system response times of less than 50µs. The Power Manager II family is easily programmed using Lattice’s free PAC Designer software. Free reference designs and the software GUI make the Power Manager II products simple to implement for a wide variety of applications. The software allows designs to be debugged and simulated, verifying timing of all I/Os and sequencing before committing to hardware, eliminating the need for costly board changes.
If this abstract has piqued your interest, read the full article online in the August issue of Electronic Specifier Design, by clicking here.