Design
Microsemi Announces Availability of Space-saving SmartFusion cSoC Devices
Microsemi Corporation announced its award-winning SmartFusion customisable system-on-chip family is now available in a "CS288" 288-ball chip scale package (CSP) package. The new small footprint package is designed for a wide range of industrial, military, communications, medical and computational applications such as security cameras, advanced weapon systems, wearable power supplies, optical transponders, flow monitors, oral x-ray sensors, remote heart monitors and single board computers.
Cobham Technical Services Supplies Electromagnetic Design Software To Siemens Wind Power To Help Optimise Generator Designs
Cobham Technical Services has been awarded a contract for its powerful Opera electromagnetic design tool by Siemens Wind Power. Fast and accurate electromagnetic simulation helps wind turbine suppliers to make breakthroughs in wind turbine design. The Siemens design team employs the Opera electromagnetic simulator from the Vector Fields Software product line of Cobham Technical Services to help it develop new generator concepts, and often runs thousands of simulations within a few hours to discover the best design solution for applications.
Simulity and StarChip unveil the availability of Tacos Java CardTM OS Platform on StarChip SCF SIM Controllers
Simulity and StarChip announced the availability of Simulity Tacos Java CardTM OS platform on StarChip SCF SIM controllers. The TACOS-J platform is a contact-based Java (U)SIM card built on Simulity's TACOS Enterprise Edition. It is fully compliant with Java Card 2.2.1 Specifications and Visa GlobalPlatform 2.1.1. The SCF SIM controllers' family has been designed to cover demands of USIM Java CardTM applications. The SCF family is based on Cortus APS3s 32-bit core enabling 25Mips 25MHz. Extended performances and best-in-class endurance (up to 400 million cycles thanks to E3 (ECUBE) proprietary mechanisms) have been implemented to deliver highly effective SIM controllers. All SCF members (SCF320G, SCF384G and derivatives) are fully flash-based, code and data with SST SuperFlash. The TACOS-J platform running on SCF controllers will be demonstrated on StarChip booth (#3B021) at Cartes & ID event 2011.
New Release of LDRA Tool Suite Automates Embedded Software Development, Slashing Certification Costs
LDRA has boosted the automation, efficiency and customisation of certification processes with Version 9 of the LDRA tool suite. While maintaining legacy tools and features, LDRA has unified its tools with a common user interface, central repositories and performance optimisations to offer superior lifecycle traceability. These improvements slash the time and cost of certification, extending LDRA's leadership in delivering certification and verification costs well below the industry average.
Microsemi Delivers Complete, Space-saving SATA Storage Systems for Secure Defence and Aerospace Applications
Microsemi Corporation launched the first in a family of complete SATA storage systems for secure embedded defense applications. The compact MSM37 and MSM75 solutions are each packaged as a single 32mm x 28mm 522 PBGA (plastic ball grid array) and provide up to 75 gigabytes (GB) of NAND flash solid state storage. The combination of these features makes the devices ideal for applications where a full-size 2.5 inch storage device is too large
ACD Selects Omnify Empower PLM Solution for Product Lifecycle Management
ACD, announces that it has selected the Omnify Empower PLM solution from Omnify Software, a leading provider of Product Lifecycle Management (PLM) software for electronic, medical, mechanical, and defense manufacturers. ACD adopted the Empower PLM solution to address its product development needs.
Synopsys' CODE V Enhances Analysis of Precision Optical Systems
Synopsys, Inc. announced the availability of enhancements to its CODE V optical design and analysis software, acquired as part of Synopsys' acquisition of Optical Research Associates. CODE V 10.4 delivers enhancements to its Beam Synthesis Propagation tool that enable optical designers to model and analyze diffraction effects in an optical system with increased flexibility, speed and accuracy. These enhancements are particularly useful for evaluating the performance of optical designs with stringent accuracy requirements, such as microlithography lenses, laser scanning systems and optical telecommunication devices.
Synopsys enhances Synplify FPGA synthesis software to enable higher reliability FPGA design
Synopsys, Inc. announced availability of the latest release of its Synplify Pro and Synplify Premier FPGA synthesis tools. The new Synplify tool release enables engineers to build higher reliability into their FPGA designs through a new feature that provides automated creation and preservation of error-correction logic, including safe finite-state machines (FSMs). Additionally, an enhanced interface for the tool allows designers to track progress and analyse synthesis results hierarchically. For ASIC prototypers, support for Synopsys DesignWare® Library MacroCell IP has been added, broadening DesignWare IP support and improving compatibility with Design Compiler.
Atmel and Redpine Signals Collaborate to Provide Ultra-Low Power 802.11n Wi-Fi Capability for AVR and ARM-based Microcontrollers
Atmel Signals today announced that system engineers can easily implement 802.11n Wi-Fi to all Atmel AVR and ARM based microcontrollers using Redpine Signals' Connect-io-n and n-Link modules. System engineers for Atmel AVR XMEGA and AVR UC3 MCU families and Atmel SAM3 and SAM9 ARM-based MCU families can now integrate Wi-Fi capability for a variety of embedded systems in building automation, metering, digital audio and medical applications.
Green Hills Software Supports Development of Groundbreaking Phase One Digital Camera
Green Hills Software announced that its compilers, Green Hills Probe and MULTI integrated development environment have been used by Phase One in the development of the Phase One IQ series digital cameras. The IQ series, which features image resolutions of up to 80 megapixels, sets new standards for medium format camera system handling and performance.
Murata Power Solutions and Powervation Team Up for New Digital Reference Design Using the Industry’s Highest Power Density Power Block
Powervation Ltd., has joined forces with Murata Power Solutions to co-develop a new reference design for Murata Power Solution's 45 A Power Block. The CEB019 digital DC/DC power solution uses Powervation's newly-launched PV3012 dual phase digital synchronous buck controller with Auto-Control, which provides the industry's only real-time, adaptive loop compensation that helps to overcome issues related to variations in external components, temperature, and user layouts, without significant design effort and support.
TI delivers leading analog integration, best-in-class low power and floating-point performance in new Stellaris ARM Cortex-M4F microcontrollers
Texas Instruments Incorporated the new low power, floating-point Stellaris Cortex - M4F microcontroller generation. All of the new LM4Fx Stellaris microcontrollers provide floating point for performance headroom and best-in-class power consumption to address portability and power budgets. Developers can also select from a variety of high-performance analog, memory and connectivity options to best satisfy design parameters across a broad range of applications, such as industrial automation, motion control, health and fitness and more. The new Stellaris MCUs are the first Cortex-M-based microcontrollers to be built on 65 nanometer (nm) technology, paving the roadmap to higher speeds, larger memory and even lower power.
ZMDI launches easy-to-use Single-Phase Digital Point-Of-Load (POL) Chipset for rapid development of Smart Power Management Solutions
ZMDI enters the smart power management market with the launch of a configurable true-digital, high-performance PWM controller for non-isolated DC/DC POL supplies. The ZSPM1000 operates as synchronous step-down converter in a single-rail and single-phase configuration. In combination with the ZSPM9000, ZMDI's ultra-compact MOSFET with integrated power-stage driver, the ZSPM1000 enables smart digital POL solutions for area constraint and high-performance applications such as servers, storage units, processor & FPGA boards, and others.
Synopsys delivers unified solution for digital and custom SoC designs
Synopsys, Inc. announced advances in its Galaxy Implementation Platform with the availability of its unified solution for mixed-signal designs. The new unified solution provides seamless integration between IC Compiler physical implementation and the Galaxy Custom Designer solution, allowing design teams to easily move between digital and custom implementation flows while maintaining design data integrity. The unified solution accelerates the design development cycle by enabling quick and reliable custom edits to IC Compiler designs at any stage of development, including the time-critical tapeout phase.
Renesas Electronics Europe and AND TR jointly announce the availability of ZigBeeTM Smart Energy 1.1 module-based design kits
Renesas Electronics Europe announced the availability of a complete ZigBee Pro module-based design kit which includes the Smart Energy1.1 profile. Based on Renesas' M16C/6B single chip ZigBee silicon, the AND TR design kits are tuned to provide optimum RF performance in the most demanding situations and have been tested for interoperability at ZigBee Smart Energy interoperability events. Competitively priced, the design kits include "TestZED" modules that can be used in product prototyping and are pre-programmed with the Renesas ZigBee Pro stack as well as the Smart Energy 1.1 profile (other profiles are available on request). The modules are easily controlled via HyperTerminal commands.
Launch of SymTA/S 3.0 and TraceAnalyzer 3.0 delivers integrated model-based and trace-based timing analysis
Symtavision, has launched SymTA/S 3.0 and TraceAnalyzer 3.0, the first fully integrated versions of these highly successful system-level tools for model-based design and trace-based verification. Targeted at automotive, aerospace, automation and other performance- and safety-critical systems, the combination of SymTA/S 3.0 and TraceAnalyzer 3.0 enables unparalleled efficiency and reliability for the dimensioning, optimization, regression-testing, and verification of controllers and networks, focusing on load, task and message latencies, system schedulability, end-to-end timing, data consistency and other key properties that ensure system correctness.
ASSET's new FPGA-controlled test (FCT) inserts and operates a board-tester-in-a-chip
With new tools for the ASSET ScanWorks platform for embedded instruments engineers can simply select instruments they need, set their parameters and insert them into a field programmable gate array to function as a circuit board tester. Once inserted, ScanWorks FCT operates the board-tester-in-a-chip from a drag-and-drop user interface to perform validation, test and debug.
Synopsys Enhances Volume Diagnostics Solution to Accelerate Yield Ramp
Synopsys, Inc. announced new capabilities in TetraMAX ATPG and Yield Explorer that decrease the time, effort and cost of deploying a volume diagnostics flow and speed-up yield ramp. When yield has not yet reached acceptable levels during initial manufacturing phases, IC product teams must quickly identify and fix the dominant causes of yield loss. Synopsys' enhanced volume diagnostics solution cross-correlates large volumes of data from design, fab and manufacturing test to thoroughly analyze the causes of yield-limiting defects.
Synopsys' DesignWare STAR Memory System Shipped in 1 Billion Chips
Synopsys, Inc. announced that its DesignWare STAR Memory System has shipped in one billion chips from semiconductor manufacturers worldwide, reinforcing its status as a trusted test and repair solution for embedded memories. The STAR Memory System is an advanced built-in-self-test solution that provides automated pre- and post-silicon memory test, debug and diagnostic capabilities. The automated BIST insertion and advanced repair features reduce design integration time and overall design cost while improving test quality.
GOEPEL electronic enables graphical JTAG/Boundary Scan Project Development
GOEPEL electronic introduces a new graphical user interface for the company's JTAG/Boundary Scan software platform SYSTEM CASCON.
ASSET's new modeling methodology extends non-intrusive JTAG/boundary-scan test coverage
A new model-based test methodology for ASSET® InterTech's ScanWorks® platform for embedded instruments extends non-intrusive boundary-scan (JTAG) test coverage to devices that previously could not be tested or programmed with boundary scan. ASSET is the leading supplier of tools for embedded instrumentation.
Simulink Code Inspector Strengthens MathWorks Support for DO-178 Certification
MathWorks has introduced Simulink Code Inspector, which facilitates the review of source code generated from Simulink models. Aerospace engineers can now use Simulink Code Inspector to create detailed model-to-code and code-to-model inspection reports that help satisfy source code verification and traceability objectives specified in DO-178B Table A-5.
TI introduces the industry’s smallest single-wire I/O expander
Texas Instruments Incorporated has introduced the industry's smallest single-wire I/O expander with self-timed, single-wire technology from Texas Instruments. The TCA5405 allows system designers to control and expand outputs to as many as five, using a single processor general purpose input/output. This expander reduces the number of connections needed, thus eliminating 50 percent of the lines versus I2C, and 75 percent compared to a serial peripheral interface (SPI) bus.
STMicroelectronics Achieves Unrivalled Broadband Home-Entertainment Performance That Revolutionizes Consumers’ TV Experience
STMicroelectronics has announced details of its breakthrough interactive latest-generation broadband home-entertainment platform, that revolutionizes connected homes by providing users with unequalled performance at extremely low power, capable of a more personalized and socially interactive viewing experience with amazing 3D graphics and easy-to-use smart navigation.
TI introduces breakthrough $1.95 DSP and $55 development kit, extending sophisticated signal processing and ultra-low power to new world of cost-sensitive applications
Texas Instruments Incorporated opened order entry for the new TMS320C553x ultra-low-power DSPs on Friday, Aug. 26, enabling developers to add sophisticated signal processing to consumer audio and voice applications, portable medical equipment, biometric security, voice-activated home automation and flow meters — at an unprecedented price. The C553x DSPs offer the lowest price DSP in the industry starting at $1.95 and are supported by the $55 C5535 eZdsp™ development kit. The DSPs also offer up to two times lower active power consumption and up to six times lower standby power consumption than the nearest DSP competitor.
Building A Smarter Meter
The move to smart energy brings massive opportunity across the supply chain but choosing the right solution needs careful consideration at every level, says ByteSnap Design Director Dunstan Power.
Cadence and GLOBALFOUNDRIES Significantly Speed Design for Manufacturing Signoff at 32, 28 Nanometers
Cadence Design Systems announced that it has teamed with GLOBALFOUNDRIES to dramatically reduce the turnaround time for design-for-manufacturing (DFM) signoff at 28 nanometers. The companies' advanced technologies enable customers to find and fix potential lithography hotspot problems that could reduce yield or even threaten viability of complex chip designs headed for manufacturing. Using the proven Cadence "in-design" DFM technology to support the GLOBALFOUNDRIES DRC+ methodology, Rambus cited a 60 times speedup of DFM signoff.
Magma’s Quartz DRC Physical Verification Solution Qualified to Support GLOBALFOUNDRIES’ DRC+ Flow for Technologies at 28 nm and Below
Magma Design Automation has announced that the new pattern matching capability in the Quartz DRC physical verification product has been qualified to support DRC+, GLOBALFOUNDRIES' silicon-validated, yield-critical pattern-based design for manufacturing (DFM) verification flow for all advanced process technologies, including 40 nanometer (nm), 28 nm and below.
Chrontel Standardizes on Magma to Accelerate Development of Analog/Mixed-Signal ICs
Magma Design Automation a provider of chip design software, today announced Chrontel, a leading provider of display interface ICs for personal computers, portable media players and smartphones, has standardized on the Titan™ Mixed-Signal Design Platform, FineSim™ SPICE and FineSim Pro circuit simulation, and Quartz™ DRC and Quartz LVS physical verification products. Chrontel selected the Magma software after an extensive evaluation and benchmarking of the Titan-based flow against other EDA flows resulted in a 50 percent improvement in productivity.
BTX Bolsters Pro Plate and Panel Designer Software With New Custom Options and Instructional Videos
BTX Technologies, a global value-added distributor and manufacturer of interface and integration products, today introduced new custom options for its BTX Pro Plate and Panel Designer software and wall plates. In addition to BTX's standard anodized aluminum wall plates and panels, the latest version of the company's free software allows customers to select from custom options such as laminated aluminum color wall plates, formed anodized aluminum plates, and anti-bowing flanged heavy-duty panels.
Bidirectional Transient Field Cable Co-simulation in CST STUDIO SUITE 2011
Computer Simulation Technology (CST) announces the release of transient bidirectional co-simulation between cable currents and the electromagnetic fields in the surrounding space for CST STUDIO SUITE™ version 2011 SP5, at IEEE EMC 2011 booth #339.
RS Components and Accelerated Designs introduce a new series of free schematic symbols and PCB footprints
RS Components and Accelerated Designs today announced the introduction of a new series of component libraries to provide customers with schematic symbols and Printed Circuit Board footprints for an extensive range of products from STMicroelectronics and Microchip Technology.
Students and Altium race ahead at Hockenheimring
Altium, a developer and provider of electronics design solutions, supports the sixth Formula Student Germany, held from 2-7 August 2011 at the Hockenheimring race track in Germany. A total of 108 teams from more than 20 countries competed with their race car designs to be the best of the best in various disciplines.
Denso Selects Ansys Fem Software To Accelerate Product Development And Drive Down Costs
ANSYS that DENSO, a worldwide automotive supplier, has selected ANSYS® FEM software to standardize and expedite product development globally, enabling the company to cut costs and boost competitiveness in a tough marketplace. DENSO will use the CAE software to increase efficiency and enhance product quality across its portfolio, which includes automotive powertrains, advanced electronics, thermal systems, refrigerators and air conditioners.
GL Enhances SIGTRAN (SS7 over IP) Emulation Software
GL Communications Inc., has announced the release of its new SIGTRAN (SS7 over IP) Emulation software - an advanced protocol simulator/tester for SS7 transport over IP Networks. Speaking to newsmen, Mr. Jagadish Vadalia, Senior Manager at GL, said, "Message Automation & Protocol Simulation™ (MAPS) is a powerful protocol test simulation platform supporting a wide range of protocols such as SIGTRAN (SS7 over IP), SS7 over TDM (T1 E1), ISDN over TDM (T1 E1), GSM-A & GSM-Abis over TDM, Megaco, SIP, and MGCP over IP. MAPS SIGTRAN is an advanced protocol simulator/tester for SS7 transport over IP Networks. It can simulate a Signaling Gateway and Softswitch ISUP signaling specification as defined by ITU-T standards. The tester supports testing network elements, error tracking, regression testing, conformance testing, load testing/call generation and generation of high volumes of ISUP traffic. MAPS SIGTRAN functionality covers the ITU and ANSI variant of SS7 implementing M3UA, and ISUP protocols. It is able to run pre-defined test scenarios against ISUP test objects in a controlled & deterministic manner".
FPGA embedded ChipVORX IP enables ultra fast Flash Programming
GOEPEL electronic, world-class vendor of JTAG/Boundary Scan solutions compliant with IEEE Std.1149.x announces the development of special ChipVORX® model library series for FPGA accelerated in-system programming (ISP) of Flash components. The ChipVORX® models developed in cooperation with the Tallinn/Estland based Company Testonica are structured modularly as intelligent IP. They enable the ultra fast in-system programming of every kind of Flash components at full workflow automation.
Source code for Micriµm’s µC/OS-III Real-Time Kernel immediately available from the element14 knode
Premier Farnell plc has announced an agreement with Micriµm, a leading supplier of embedded RTOS solutions, to provide free evaluation access to the source code for Micriµm's µC/OS-III Real-Time Kernel through the element14 knode, enabling electronic design engineers to quickly develop new products. The move is in line with the Group's focus on providing engineering design solutions, driving business to the web and growing sales in emerging markets.
ByteSnap Design launches Low Power ZigBee Smart Energy Module Targets Metering and Control
ByteSnap Design Ltd announces the release of the ZMM-01, the industry's first ever ZigBee Smart Energy module to combine the key features of metering and control in a single, low power platform. The ZMM-01 also provides a Real Time Clock, accurate up to 2ppm.
Evaluation board for the new LPC1800 family
For NXP's new Cortex-M3-based LPC1800 microcontrollers, Hitex now offers the Evaluation Board LPC1850 ensuring an easy evaluation of the LPC1800 family's main features.
MEDER electronic - Streamlining Sensor Design with the Launch of 4 New Reed Sensor & Magnet Design Evaluation Kits!
MEDER electronic, Inc. has announced the release of their new Reed Sensor & Magnet Design and Evaluation Kits, designed by engineers for engineers to streamline the process of sensor system design. These kits provide engineers with quick and convenient access to sensor systems for evaluation purposes, taking the guess work out of the sensor design process. MEDER's proprietary 3-D magnetic mapping equipment was used to accurately map out the activation distances in mm for 5 different position and movement configurations of each sensor, along with its corresponding magnet.
