Toshiba unveils 130nm BiCD for next-generation automotive-rugged integration
News Release from:
Toshiba Electronics Europe
16 November 2010
Toshiba Electronics Europe has revealed details of its new BiCD process, which combines 130nm logic design rule with current-handling capability to permit unprecedented integration in devices such as sensorless BLDC motor drives. The process is able to guarantee full specification over a wide temperature range, as well as high ESD robustness, providing a platform for a variety of industrial and automotive IC projects.
The process combines Bipolar, CMOS and LDMOS base technologies with deep trench isolation. This results in high voltage capability, up to 60V, with greatly reduced leakage currents, especially at high temperatures. By also achieving low on-resistance (RDS(ON)A), 32mΩ・mm2 for 40V, 70mΩ・mm2 for 60V, the new process delivers outstanding power-handling efficiency as well as high integration of control and bus-interface functions using its 130nm CMOS technology.
Supporting the new process, Toshiba also has high-density power package technologies such as Heatsink QFP (HQFP), QFN, and Wafer-level Chip-Scale Packages (WCSP) engineered to withstand the automotive environment.
Toshiba’s 130nm BiCD process is available for commercial custom IC development. It will also provide the foundation for forthcoming families of Toshiba automotive ICs implementing LIN nodes for a variety of motor-control applications such as various HVAC functions.
Thomas Kuschel, senior manager, microcomputer, automotive & consumer IC marketing, Toshiba Electronics Europe, said, “The combination of 130nm design rule and high current-handling capability will enable smaller, more reliable and intelligent controllers. Manufacturing costs are also lower than for a comparable Silicon On Insulator (SOI) process. In the automotive marketplace, these advantages will translate into improvements such as greater fuel economy and comfort, as well as cost savings.”